4.6.1. CMOS Processes

Try these first

1. 1.

   What does CMOS stand for?

   Hint

   Think about the components of integrated circuits.

2. 2.

   What is a technology node?

   Hint

   It relates to the scale of the manufacturing process.

3. 3.

   What does CMOS stand for?

   Hint

   Break down the name into its components.

4. 4.

   True or False: SOI technology decreases parasitic capacitance.

   • True
   • False

   Hint

   Think about what parasitic capacitance does to circuit performance.

5. 5.

   You are designing a mixed-signal chip for a wearables application. Given that power consumption and noise levels are critical, what technology node would you choose? Justify your choice.

   Hint

   Consider the application's power needs against noise tolerances.

6. 6.

   Explain how RF and digital component integration can impact each other's performance on a mixed signal chip.

   Hint

   Think about how electrical signals can interact in close proximity.