Field-Effect Transistors (FETs) represent another fundamental class of transistors, distinct from BJTs in their operational principle. Unlike BJTs, which are bipolar (relying on both electron and hole conduction), FETs are unipolar devices, meaning their operation depends on the flow of only one type of majority charge carrier (electrons in n-channel FETs, holes in p-channel FETs). Crucially, FETs are voltage-controlled devices, where the voltage applied to their gate terminal directly controls the current flowing between their source and drain terminals. This contrasts with BJTs, which are current-controlled.

FETs offer several significant advantages in specific applications:
- Extremely High Input Impedance: This is the most prominent advantage. FETs, particularly MOSFETs, have input impedances typically in the megaohm (MΩ) to gigaohm (GΩ) range. This characteristic makes them ideal for the input stages of voltage amplifiers, where it's crucial to avoid "loading" the signal source (i.e., drawing minimal current from it) to preserve the integrity of the input voltage signal.
- Lower Noise: FETs generally produce less electrical noise than BJTs, making them suitable for low-noise amplifier applications, especially in the first stage of sensitive receivers.
- Temperature Stability: FET parameters are generally less sensitive to temperature variations compared to BJT parameters, leading to more stable amplifier performance over a range of temperatures.
- Smaller Size and Higher Integration Density (MOSFETs): MOSFETs can be manufactured to be exceptionally small, enabling extremely high integration densities in integrated circuits (ICs). This is why MOSFETs are the dominant active device in modern digital microprocessors and memory chips.
- No DC Gate Current: Unlike BJTs which require a small DC base current, ideal FETs draw virtually no DC gate current, simplifying biasing in some cases and preventing loading of input DC sources.

FETs are broadly categorized into two primary types based on their internal structure and operating principles:
- Junction Field-Effect Transistors (JFETs):
- Structure: A JFET consists of a single semiconductor channel (either N-type or P-type) with two heavily doped P-N junctions formed on its sides. These two junctions are typically connected together to form the gate terminal. The ends of the channel are the drain and source terminals.
- Operation Principle: The width (and thus the resistance) of the conductive channel is controlled by the reverse-bias voltage applied between the gate and source (VGS). As VGS is made more negative (for an n-channel JFET), the depletion regions associated with the P-N junctions widen and penetrate further into the channel. This narrowing of the effective channel increases its resistance, thereby reducing the drain current (ID) flowing through it.
- Operating Mode: JFETs are inherently depletion-mode only devices. This means they operate by depleting (narrowing) an existing channel.
- Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs):
- Structure: A MOSFET is distinguished by its gate structure: a metal gate electrode is electrically insulated from the semiconductor channel by a very thin layer of silicon dioxide (SiO₂), which acts as an insulator. This insulating layer is what gives MOSFETs their characteristic extremely high input impedance.
- Types of MOSFETs:
- Depletion-type MOSFET (D-MOSFET):
- Structure: Possesses a physically present channel when the gate-source voltage (VGS) is zero.
- Operation: Can operate in both depletion mode (by applying a negative VGS for n-channel, reducing the channel width and ID) and enhancement mode (by applying a positive VGS for n-channel, further widening the channel and increasing ID beyond its zero-VGS value).
- Enhancement-type MOSFET (E-MOSFET):
- Structure: Does not have a physically present channel when VGS =0. The substrate material forms part of the channel region.
- Operation: A conducting channel must be induced (or "enhanced") by applying a sufficient positive VGS (for n-channel) that is greater than a specific threshold voltage (VTh). If VGS <VTh, the MOSFET is essentially off, with very little drain current. E-MOSFETs are the most widely used type in modern digital integrated circuits due to their "normally off" characteristic, which simplifies logic gate design.

• Terminals: Gate (G), Drain (D), Source (S).
• N-channel JFET Operation:
• For proper operation, the drain-source voltage (VDS) is typically positive (Drain positive relative to Source).
• The gate-source voltage (VGS) is typically negative or zero.
• When VGS =0, the drain current (ID) is at its maximum for a JFET, denoted as IDSS (Drain-to-Source current with Shorted Gate).
• As VGS is made more negative, the reverse bias across the gate-channel junctions increases, widening the depletion regions and effectively narrowing the conductive channel, which in turn reduces ID.
• Pinch-off Voltage (VP): This is the specific negative value of VGS (for n-channel) at which the channel is completely "pinched off," and the drain current (ID) drops to approximately zero. VP is a characteristic parameter of the JFET. (Note: For n-channel, VP is a negative voltage, e.g., VP =−4 V).
• Transfer Characteristic (ID vs. VGS): This curve shows the non-linear relationship between the drain current (ID) and the gate-source voltage (VGS) for a JFET in its saturation region. It is described by Shockley's Equation: ID =IDSS (1−VP/VGS)²
• Where:
  • ID is the drain current.
  • IDSS is the maximum drain current when VGS =0.
  • VGS is the gate-source voltage.
  • VP is the pinch-off voltage.
• Output Characteristics (ID vs. VDS for various VGS): These are a family of curves that illustrate the relationship between the drain current (ID) and the drain-source voltage (VDS) for different constant values of VGS.
• Ohmic Region (Triode Region): For small values of VDS, the JFET acts like a voltage-controlled resistor. ID increases almost linearly with VDS.
• Active Region (Saturation Region): This is the crucial region for amplifier operation. When VDS exceeds a certain value (specifically, VDS >VGS −VP), the channel becomes "pinched off" near the drain, and the drain current (ID) becomes relatively constant (saturated) for a given VGS, largely independent of further increases in VDS. This is the region where the JFET provides significant voltage-controlled current amplification.
• Breakdown Region: At very high VDS values, the reverse-biased gate-drain junction can break down, causing the drain current to increase rapidly and uncontrollably. Operation in this region is destructive to the device.

• Terminals: Gate (G), Drain (D), Source (S), and often a Body/Substrate (B) terminal (usually connected to the source or lowest potential).
• Depletion-type MOSFET (D-MOSFET):
• Its characteristics are very similar to those of a JFET. It can operate with VGS =0, producing IDSS.
• For n-channel D-MOSFETs, applying a negative VGS depletes the channel, reducing ID (depletion mode).
• Applying a positive VGS enhances the channel, increasing ID beyond IDSS (enhancement mode).
• Shockley's equation is often adapted for D-MOSFETs, sometimes replacing VP with VGS(off) or a threshold voltage.
• Enhancement-type MOSFET (E-MOSFET):
• Unique Feature: Unlike JFETs and D-MOSFETs, an E-MOSFET has no physical channel present when VGS =0.
• Threshold Voltage (VTh or VT): A positive gate-source voltage (for n-channel E-MOSFET) must be applied that exceeds a specific threshold voltage (VTh) to induce a conductive channel between the source and drain. If VGS <VTh, the MOSFET is effectively off, and ID is negligible. E-MOSFETs are the most widely used type in modern digital integrated circuits due to their 'normally off' characteristic, which simplifies logic gate design.

Just like BJTs, FETs require careful biasing to establish a stable DC operating point (Q-point) within their active region (specifically, the saturation region for FETs). This is crucial for achieving linear amplification of AC signals without distortion. The Q-point defines the specific DC values of drain current (ID) and drain-source voltage (VDS) when no AC input signal is present.
- Why Biasing for FETs?
- Linear Amplification: The active (saturation) region of a FET's characteristics is where its transconductance (gm =ΔID/ΔVGS) is relatively constant. Proper biasing ensures that the AC input signal is superimposed on a stable Q-point within this linear region, minimizing non-linear distortion of the amplified output.
- Stability: The Q-point of a FET amplifier needs to be stable against variations in device parameters (e.g., IDSS, VP for JFETs; or k, VTh for MOSFETs), which can vary significantly between devices of the same type and also with temperature.
- Maximum Signal Swing: A well-chosen Q-point, often placed around the midpoint of the active region's load line, allows for the maximum possible peak-to-peak swing of the output signal without the FET entering the cutoff or triode (ohmic) regions, which would introduce clipping and distortion.