Practice Question 1 (3.1) - Introduction to Sequential Logic: CMOS D-Latch/Flip-Flop Schematic and Simulation
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Question 1

Practice - Question 1 - 3.1

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Practice Questions

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Question 1 Easy

What is a key difference between sequential and combinational logic?

💡 Hint: Think about whether past data influences current output.

Question 2 Easy

Define t_setup in your own words.

💡 Hint: Consider when the input should stop changing before the clock ticks.

4 more questions available

Interactive Quizzes

Quick quizzes to reinforce your learning

Question 1

What is the function of a D-Latch?

Stores data when CLK is low
Stores data when CLK is high
Only reads data

💡 Hint: Consider how the latch behaves with different clock signals.

Question 2

True or False: Flip-Flops have memory.

True
False

💡 Hint: Think about what it means for a circuit to have memory.

1 more question available

Challenge Problems

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Challenge 1 Hard

Given a D-Flip-Flop with t_CQ = 60 ps, t_setup = 30 ps, and t_hold = 20 ps. How can the circuit be optimized for higher speed?

💡 Hint: Consider trade-offs between speed and circuit integrity.

Challenge 2 Hard

Consider a scenario where a D-Flip-Flop violates both setup and hold times. Describe the potential outcomes.

💡 Hint: Think about how each timing characteristic influences the stability.

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