1. Differential Amplifier Design (DC Biasing):
   ○ Power Supply: Use a dual power supply (e.g., +/- 12V or +/- 15V).
   ○ Current Source Design:
   ■ Option 1 (Resistor Approximation): Select a large emitter resistor (R_E, e.g., 22 kΩ to 100 kΩ) connected from the common emitter node to the negative supply (-Vee). This provides a relatively constant current (I_E≈(−V_EE−V_BE)/R_E) shared by the two transistors.
   ■ Option 2 (Dedicated BJT Current Source - Recommended for better CMRR): Design a simple BJT current source circuit using a third NPN transistor (Q3) and two resistors to set its base voltage and emitter current. The collector of Q3 then connects to the common emitters of Q1 and Q2. (Refer to Figure 7.1, the more complex version). Target a total current (e.g., 1 mA or 2 mA) to be split equally between Q1 and Q2. So, I_CQ1=I_CQ2=I_total/2.
   ○ Collector Resistors (R_C): Choose R_C values (e.g., 4.7 kΩ to 10 kΩ) to achieve appropriate voltage drops and set collector voltages within the active region. Ensure V_C−V_E1>V for both transistors.
   ○ Transistor Matching: If possible, select two NPN BJTs (Q1 and Q2) with as similar beta (hFE) values as possible using a DMM.
   ○ Pre-Calculations: Calculate theoretical A_d, A_cm (if using R_E), and CMRR based on your design values. Record these in Table 7.1.

1. Circuit Construction:
   ○ Assemble the BJT differential amplifier on the breadboard as per Figure 7.1. Pay close attention to transistor pinouts and resistor values.

1. DC Q-point Measurement:
   ○ Apply the dual DC power supply.
   ○ Measure the DC voltages at the bases, emitters, and collectors of Q1 and Q2 using the DMM. Verify that both transistors are biased in the active region and that the current source is functioning as expected.
   ○ Measure the voltage across one of the collector resistors and calculate the approximate collector current for one side (I_CQ=V_RC/R_C). Record in Table 7.1.

1. Differential Gain (A_d) Measurement:
   ○ Apply a small sinusoidal input signal (V_in) (e.g., 100 mV p-p at 1 kHz) to the base of Q1 (V_in1) and ground the base of Q2 (V_in2=0). This forms a single-ended differential input.
   ○ Connect Oscilloscope Channel 1 to V_in1 and Channel 2 to V_out1 (collector of Q1).
   ○ Measure V_in(p−p) and V_out(p−p) from Channel 2.
   ○ Calculate A_d=V_out(p−p)/V_in(p−p). Note the phase shift.
   ○ Alternatively, to measure true differential gain, apply V_in to V_in1 and −V_in (inverted signal from function generator or phase splitter) to V_in2. Or, apply V_in/2 to V_in1 and −V_in/2 to V_in2. Then A_d=V_out/(V_in1−V_in2). The first method (one input driven, other grounded) is often sufficient for practical purposes, as V_id=V_in1−0=V_in1.
   ○ Record measured A_d in Table 7.2.

1. Common-Mode Gain (A_cm) Measurement:
   ○ Connect the bases of Q1 and Q2 together, and apply a sinusoidal input signal (V_ic) (e.g., 100 mV p-p at 1 kHz) to this common point.
   ○ Connect Oscilloscope Channel 1 to the common input (V_ic) and Channel 2 to V_out1 (collector of Q1).
   ○ Measure V_ic(p−p) and V_out(p−p). Note that V_out should be very small.
   ○ Calculate A_cm=V_out(p−p)/V_ic(p−p). Record measured A_cm in Table 7.2.

1. CMRR Calculation:
   ○ Using your measured A_d and A_cm from steps A.4 and A.5, calculate the Common Mode Rejection Ratio:
   CMRR=∣A_d∣/∣A_cm∣
   CMRR_dB=20log_10(CMRR)
   ○ Record in Table 7.2.

1. Setup:
   ○ Keep the differential amplifier circuit from Part A.
   ○ Connect the bases of Q1 and Q2 together.
   ○ Apply a DC voltage source to this common base point (using a variable DC power supply or potentiometer connected to a fixed supply). Use the DMM to measure this common-mode DC input voltage (V_ic).
   ○ Connect the oscilloscope to V_out1 (collector of Q1) to monitor the output.
   ○ Superimpose a small AC signal (e.g., 1 kHz, 50 mV p-p) on this DC common-mode input voltage. This AC signal will allow you to see the gain.

1. Procedure:
   ○ Slowly vary the common-mode DC input voltage (V_ic) from a low negative value towards positive.
   ○ Observe the AC output signal on the oscilloscope.
   ○ Note the lowest common-mode input voltage at which the output signal starts to distort or disappear (indicating cutoff). This is your lower ICMR limit.
   ○ Note the highest common-mode input voltage at which the output signal starts to distort or clip (indicating saturation or cutoff at the upper rail). This is your upper ICMR limit.
   ○ Record these values in Table 7.3.

1. Op-Amp Power Supply: Connect the Op-Amp (LM741) to a dual DC power supply (e.g., +/- 15V). Pin 7 to +Vcc, Pin 4 to -Vee.

1. Inverting Amplifier:
   ○ Design: Choose values for R_in and R_f to achieve a desired gain (e.g., gain of -10: R_in=1kΩ, R_f=10kΩ).
   ○ Circuit Construction: Assemble the inverting amplifier circuit as per Figure 7.2. Ground the non-inverting input.
   ○ Gain Measurement: Apply a sinusoidal input signal (e.g., 1 kHz, 100 mV p-p) to R_in. Measure V_in(p−p) and V_out(p−p) using the oscilloscope. Calculate A_v=V_out/V_in. Observe the phase shift (should be 180 degrees). Record in Table 7.4.

○ Bandwidth Measurement: Perform a frequency sweep (similar to Experiment 3, Part C). Keep V_in constant. Vary the frequency from mid-band (e.g., 1 kHz) upwards until the gain drops by 3 dB from the mid-band gain. This is your upper cutoff frequency (f_H). Since Op-Amp circuits typically have low-frequency gain maintained by coupling capacitors, f_L is usually very low. Calculate the bandwidth BW=f_H−f_L≈f_H. Record in Table 7.4.

1. Non-Inverting Amplifier:
   ○ Design: Choose values for R_1 and R_2 to achieve a desired gain (e.g., gain of +10: R_1=9kΩ or 8.2k+820k, R_2=1kΩ).
   ○ Circuit Construction: Assemble the non-inverting amplifier circuit as per Figure 7.3. Connect V_in directly to the non-inverting input.
   ○ Gain Measurement: Apply a sinusoidal input signal (e.g., 1 kHz, 100 mV p-p). Measure V_in(p−p) and V_out(p−p). Calculate A_v=V_out/V_in. Observe the phase (should be 0 degrees). Record in Table 7.4.

○ Bandwidth Measurement: Perform a frequency sweep similar to the inverting amplifier to find f_H. Calculate BW. Record in Table 7.4.

1. Discussion: Based on the theoretical knowledge from Section 4.2.1 and your observations from Op-Amp circuits, discuss the roles of the three main internal stages of a typical Op-Amp.
2. Identification: For example, how does the differential input stage provide high input impedance and common-mode rejection? How do intermediate stages contribute to high gain? How does the output stage provide current driving capability and low output impedance? This part primarily involves analysis and discussion rather than direct measurement.