67.3. Introduction to Common Source Amplifier with Active Load

Yeah. So, welcome back after the short break. And we were discussing about the limitation of the voltage gain of the common emitter and common source amplifier particularly if it is having passive load. And intuitively we understand that, how it can be enhanced. Namely in case if we can get some characteristic load line characteristic like this, instead of having a linear characteristic. In fact, that is the center point of getting higher gain of any amplifier using active load.

I must also say in this context that in case if you are putting some arbitrary active load thinking that that may be improving the gain, but then it may not. Say for example, in case if you are increasing the slope here, instead of decreasing the slope then it may be rather the gain it may be lower.

This chunk explains the initial limitations faced by common source amplifiers when they use passive loads. When a common emitter or common source amplifier employs passive loads, the voltage gain becomes limited. To overcome this limitation, one can introduce a more optimal load line characteristic. However, caution is required: simply increasing the slope of the load line does not always increase the gain. Sometimes, it can even lead to a reduction in gain due to the non-linear nature of the I-V characteristics. This suggests that understanding the load's characteristics is crucial for designing amplifiers with improved performance.

Imagine trying to push a heavy shopping cart over a sidewalk gradient. If the slope of the path is too steep, your push could easily become ineffective, making it harder to move the cart. Similarly, in amplifiers, if the slope of the load line is too steep or improperly designed, the expected increase in performance could actually result in decreased efficiency.

So, let us see what kind of implementation we can think of to get this kind of non-linear load line, particularly this one which is giving us the gain. So, in the next slide we do have common source amplifier with active load.

So, here the lower part we are retaining same and same circuit we do have the M 1 which is receiving the signal at its gate along with the DC voltage. But then it is also having the load, which is instead of having passive load, but it is having a transistor M 2. Note that this transistor M 2, this is PMOS transistor right. And its source it is connected to V DD and the gate it is receiving DC voltage defined by say V SG with respect to V DD.

This chunk describes the implementation of a common source amplifier using active load. Unlike passive loads, this setup incorporates a PMOS transistor as the load. The active load allows for the establishment of a non-linear load line which can significantly enhance voltage gain. The transistor is strategically biased with a DC voltage to set its operating point. The design is based on the idea that by integrating active components, better amplification can be achieved due to the improved dynamics of the load characteristics compared to passive systems.

Think of a car's engine (active load) compared to a person's strength (passive load) pushing the car. While the person can only provide a limited amount of power to move the car, the engine uses fuel in an optimized manner to produce a large amount of force and speed. Similarly, the active load transistor can provide significant improvements in gain compared to passive setups.

Now naturally, then who defines this current? For proper operation, we require both the current should be equal and we need to satisfy some condition to ensure that I DS1 and I DS2 should be equal. Well, at this node we do not have any other circuit connected. So, it is very natural to say that why do we require any condition for this two current to be equal; because it is KCL as we do not have any other circuit connected here.

This segment emphasizes the importance of current matching in the operation of the common source amplifier with an active load. For the amplifier to function optimally, the drain currents (I_DS1 and I_DS2) of the two transistors need to be equal. This equality is enforced due to Kirchhoff's Current Law (KCL) because there are no other paths for the current to flow in that branch of the circuit. If the currents do not match, it can lead to instability and potentially degrade amplifier performance.

Consider two people racing to carry buckets of water to a finish line. If one person carries more water than the other, they may be slower, causing the other to catch up or slow down. The race can’t proceed fairly until both are carrying the same amount of water consistently. Similarly, both transistors must “carry” equal currents to ensure the amplifier works efficiently and predictably.

In other words the (I DS) into its corresponding K called K′ of transistor. × n (I DS) should be equal to K′ of the second transistor and its corresponding Kp. So, this is PMOS transistor. So, threshold voltage may be ‒ve. So, that is why I am putting mod here then (I DS). Now, this condition need to be satisfied to ensure both the devices is in good condition.

This chunk discusses the relationship between the drain current (I_DS) and the device characteristics (K′) for NMOS and PMOS transistors. The gain performance of the amplifier relies not just on equal currents but also on the transistors' parameters. The gain is influenced by factors such as the transconductance (K′). Ensuring that both transistors are in saturation and their characteristics are properly aligned contributes to their optimal function and maximizes amplification potential.

Just like in a sports relay team, where each member must not only run equally fast but also synchronize with their teammates during the baton exchange. If one runner is too slow or misaligned, the overall performance of the team will suffer. Similarly, if the transistor characteristics are not aligned or in the correct range, the amplifier cannot reach its full potential.

In fact, if I consider slope of this line, it is slope of this line it is change in I DS or I with respect to V. In fact, this is nothing, but of transistor-2. So, since the slope here it got change here so; that means, the slope of this line it is remaining same magnitude wise and hence slope of this blue line; it is or whatever you say essentially both are same.

This section covers the calculation of voltage gain for the common source amplifier with active load. It explains that the slope of the load line is critical in determining the voltage gain. The comparison of slopes between the output characteristics of the transistors and the load line provides insights into how the gain is derived. Understanding these slopes helps predict how an alteration in input voltage will impact the output signal.

Think of adjusting the volume on a speaker. When you increase the volume knob (input voltage), the speaker output (sound) will increase depending on how efficiently the speaker's internal components can amplify the sound. If the components are finely tuned and work well together (similar slopes), you’ll get a significantly louder sound output for a small adjustment in the volume, demonstrating efficient gain.

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