4.2.3. Propagation Delay

Now, we have to see one more things. Now, said these are some logic gates or electronic component when you put signal 1 and 1 immediately we are not going to get the result over here because this electronic components are having some delays, it need some times and that time whatever time it is required we say this is the propagation delay of that particular block, here we are simply using an exclusive OR gate. So, this XOR gate will take some time to give me the final stable output over here.

Propagation delay refers to the time taken for a signal to travel through a logic gate (like AND, OR, or XOR). When we input a signal, such as '1', there will be a delay before we see the output. For example, if we input a signal into an XOR gate, it does not instantly give us the output. Instead, it takes a certain amount of time to compute the output. The propagation delay can vary depending on the type of gate and the conditions under which it's operating.

Think of propagation delay like a telephone call. When you speak into the phone, the person on the other end doesn’t hear your voice instantaneously. There’s a slight delay before they hear you because of the time it takes for sound waves to travel through the air. Similarly, in electronic circuits, signals take time to move from one place to another based on the characteristics of the components involved.

So, once we get a stable output then only we can work with this particular second gate because 0 is coming, 𝐶 is coming immediately as soon as I am giving the input, but the second input to this particular XOR will come after some unit of time only which depends on the propagation delay of this particular gate and this second gate will also have some propagation delay so finally, we are going to get a correct result.

In digital circuits, when a signal is processed through several gates, each gate introduces its own propagation delay. Therefore, if one gate generates an output, that output cannot be used immediately by the next gate because the first gate takes time to stabilize its output. This sequence of delays can cause the overall response time of the circuit to extend, which is important to consider in circuit design, especially for high-speed applications.

Imagine a relay race where each runner passes the baton to the next. If the runner takes time to grasp the baton before they start running, the next runner has to wait. This delay means the entire team may finish the race slower than expected. In circuitry, each ‘runner’ (or gate) needs time to ‘pass the baton’ (or output a signal) before the next one can proceed.

So, in that particular case you just see that if the propagation delay of the first adder is some time 𝑡 then total time that required to get a correct output of this full adder will be maybe your 4 times of 𝑡 because second full adder is going to give me the correct result after first after 𝑡 unit of time. Second full adder is going to give me a stable output after 2𝑡 time.

When you are working with multiple logic gates in series, the total propagation delay increases cumulatively. For example, if the first gate (like a full adder) takes 't' units of time to stabilize its output, the second gate will not provide an output until 't' has passed, and it will take another 't' time to process the signal. Thus, if there are four gates in a series chain, the overall propagation delay would total 4t.

Returning to the relay race analogy, if each runner takes a certain amount of time to pass the baton and there are four runners, you can expect the total time to complete the relay to be four times the time taken by one runner to pass the baton. Each runner (or gate) contributes their own time delay to the overall race (or circuit performance).

Now, like that if you are going for 𝑛 bit data; that means, the total propagation time will be your 𝑛𝑡, where 𝑡 is the propagation delay of 1 full adder. So, you just see that nowadays we are talking about say 32 bit computers, 64 bit computers that means it will take a lot of time to give me the output.

As the size of the data increases (e.g., from 1 bit to 32 or 64 bits), the total propagation delay also increases linearly based on the number of bits being processed. If each full adder takes time 't' to process a single bit, then for 64 bits, the required time becomes 64t. Hence, in modern computing, where speed is critical, reducing propagation delay becomes a crucial factor in circuit design.

Consider a production line where each worker takes a specific amount of time to complete their task. If you expand the line to include more workers (or bits), the total time to produce the final product increases. In computer architecture, optimizing the speed of each component on the assembly line reduces the overall processing time, leading to faster performance.

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