12.4. Example of Page Table Calculation

The next approach that is used to reduce page table sizes is by using hierarchical page tables. So firstly, what did we use? We used a page table length register which was without segmentation, and then we said that typically the virtual address space has a stack part and a heap part to address.

In computing, to manage memory more efficiently, systems use hierarchical page tables. Initially, the page table length register was used without any segmentation to keep track of address spaces within the virtual memory. Virtual memory is divided into sections, including a stack and a heap. This division allows different portions of memory to be utilized for various purposes.

Think of a library where different sections are dedicated to different genres of books. The library has a system to manage how many books each genre can hold, similar to how a computer manages memory through a page table.

We addressed that by having two segments; one containing possibly the stack, the other containing the heap, and each of these two segments has two page tables.

To efficiently manage the memory allocated to processes, systems can segment the virtual address space into two main parts: the stack and the heap. By creating separate page tables for these segments, the system can accommodate more flexible memory allocation. This approach allows the address space to grow in both directions, improving memory utilization.

Imagine a flexible storage unit divided into two areas: one for documents (stack) and one for supplies (heap). By using separate bins for each type of item, you can manage the inventory more efficiently.

Now, we come to a hierarchical page tables. The simple scheme in this is a two-level page table. The page number is split into two parts. One is P1; the other is P2.

In a hierarchical page table structure, a virtual address is divided into two parts. The first part (P1) indexes into an outer page table, while the second part (P2) indexes into an inner page table. This structure allows the system to manage memory more effectively by breaking down the address space into multiple levels, making it easier to find the physical address corresponding to the virtual address.

Consider a company with a hierarchical organizational structure. The top level (P1) could be department heads, while the second level (P2) consists of specific teams within those departments. This organization allows for efficient decision-making and resource allocation.

From P1 I go to the outer page table. The page table base register tells me the position in memory of the start of the outer page table.

When a logical address is processed, the system uses the Page Table Base Register (PTBR) to find the start of the outer page table. It uses the first part of the virtual address (P1) to locate the correct outer table entry. Then, it accesses the inner page table using P2, eventually leading to the physical address by adding the page frame number to the offset.

This is similar to using a map to find a specific house in a town. You first look at a map of the town (the outer table) to find the right neighborhood (the inner table), and then you find the exact address of the house (the physical address).

Now, two-level paging is not always sufficient. Even two-levels paging is not sufficient for 64-bit computers.

In modern computing, especially with 64-bit architectures, two-level paging can become inadequate due to the vast amount of memory that needs to be addressed. For example, if each page is 4 KB, a single page table could require a very large number of entries, making it impractical. Therefore, more levels of page tables may be needed to effectively manage the memory.

Think of extending a high-rise building with more floors as the number of tenants increases. If each floor can hold limited apartments (pages), additional floors (levels of page tables) must be added to accommodate all tenants.

The next approach is the use of an inverted page table. Now, the main concept in the inverted page table is that instead of having a page table for each process, we keep track of all physical pages.

The inverted page table simplifies memory management by tracking physical memory pages instead of individual process page tables. This structure contains a single table that holds the mapping of physical pages to their corresponding virtual addresses, thus reducing the amount of memory required for page tables and allowing for more efficient searching.

Consider an apartment building where instead of having separate lists for each tenant (process), there is a single master list of all apartments and their current residents. This way, finding where someone lives becomes easier since you no longer need multiple lists.

We will take an example and solve a small numerical. A computer uses 46-bit virtual addresses, 32-bit physical addresses, and a three-level page table organization.

The example focuses on calculating the size of a page given the parameters of a three-level page table organization. This involves understanding how many entries each level of the page table can hold and determining the overall size of the tables based on the virtual and physical address sizes.

Calculating the size of a page can be like determining how many boxes you can fit into a storage unit, depending on the dimensions of each box (page) and the overall space (address). Understanding the organization of the items helps in maximizing the use of available space.

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