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1.2.3. RTL Design (Register Transfer Level Design)
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Practice test
11 questions on this section. Wrong answers show you what to read again.
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Revision test
Mixed questions from across the chapter. Your answers get marked.
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Flashcard drill
3 cards from this lesson. Good the night before a test.
Try these first
- 1.
What is RTL design?
Hint
Think about what aspect of digital design RTL pertains to.
- 2.
Name a common HDL used in RTL design.
Hint
What are the main languages used for describing hardware?
- 3.
What does RTL stand for?
- Return Time Level
- Register Transfer Level
- Real Time Logic
Hint
Break down the acronym!
- 4.
True or False: IP blocks are designed from scratch for each SoC.
- True
- False
Hint
Think about previous lessons on integration.
- 5.
Design and write RTL code for a simple 2-to-1 multiplexer. Explain your code.
Hint
Think about how selection works in logic circuits.
- 6.
Evaluate the potential issues that may arise if HDL simulations are neglected in the SoC workflow.
Hint
Consider how lacking verification affects product launches.
Exercises
Total Questions
2
Estimated Time
4 min
Passing Score
70%
Instructions
- Read each question carefully
- You can use hints if you need help
- Complete all questions before submitting
4 more questions available
Enrol freeQuiz
Total Questions
2
Estimated Time
4 min
Passing Score
70%
Instructions
- Read each question carefully
- You can use hints if you need help
- Complete all questions before submitting
1 more question available
Enrol freeChallenge Problems
Total Questions
2
Estimated Time
4 min
Passing Score
70%
Instructions
- Read each question carefully
- You can use hints if you need help
- Complete all questions before submitting