Practice Objective (4.1.1) - Design and Simulation of Basic Combinational CMOS Logic Gates (NAND/NOR)
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Objective

Practice - Objective - 4.1.1

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Practice Questions

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Question 1 Easy

What does a NAND gate do?

💡 Hint: Think about the truth table for a NAND gate.

Question 2 Easy

What is propagation delay?

💡 Hint: Recall when input signals change and their effect on output timing.

4 more questions available

Interactive Quizzes

Quick quizzes to reinforce your learning

Question 1

What is a key advantage of CMOS designs?

Low power consumption
High cost
Complex circuitry

💡 Hint: Consider the energy used when the transistors are not switching.

Question 2

True or False: The propagation delay tpHL is measured from low to high.

True
False

💡 Hint: Remember the definitions of the propagation delays.

1 more question available

Challenge Problems

Push your limits with advanced challenges

Challenge 1 Hard

Design a 2-input NAND gate and derive its truth table from the circuit schematic.

💡 Hint: Remember the connections of PMOS and NMOS in your circuit.

Challenge 2 Hard

Explain how optimizing transistor sizing can affect overall circuit performance, focusing on rise and fall times.

💡 Hint: Consider real-life scenarios where slight changes affect speed.

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