A fundamental BJT differential amplifier, often referred to as a "differential pair," is characterized by its symmetrical construction, typically comprising:
● Two Matched Transistors (Q1 and Q2): These are usually Bipolar Junction Transistors (BJTs) or Field-Effect Transistors (FETs). For optimal performance, these transistors are meticulously matched in their electrical characteristics (e.g., current gain Beta for BJTs, threshold voltage Vth for FETs). This matching ensures that they respond identically to common-mode signals and symmetrically to differential signals.
● Two Matched Collector/Drain Resistors (RC1 and RC2): Connected to the collectors of Q1 and Q2 (or drains for FETs), these resistors serve to convert the differential changes in collector/drain currents into corresponding differential voltage changes at the output. It is crucial that RC1 and RC2 are as closely matched as possible for effective common-mode rejection.
● A Common Emitter/Source Resistor (RE or RS): This resistor is connected between the emitters of Q1 and Q2 (or sources for FETs) and a common ground or negative power supply rail. Its presence provides crucial negative feedback for common-mode signals. In high-performance differential amplifiers, this resistor is ideally replaced by a high-impedance constant current source to further enhance common-mode rejection.
● Two Input Terminals (V1 and V2): The signals to be amplified are applied to the base of Q1 and the base of Q2 (or gates for FETs). V1 is often referred to as the non-inverting input, and V2 as the inverting input, though this depends on where the output is taken.
● Output Terminals: The output can be obtained in two ways:
○ Differential Output: Taken directly between the collectors/drains of Q1 and Q2 (Vout = Vc1 - Vc2 or Vd1 - Vd2). This configuration typically offers the highest differential gain and best common-mode rejection.
○ Single-Ended Output: Taken from one collector/drain with respect to ground (e.g., Vout = Vc1 or Vout = Vc2). This simplifies the interface to subsequent stages but generally results in half the differential gain and reduced common-mode rejection compared to a differential output.

1. Differential Mode Operation (Amplifying the Difference):
   Imagine an input where V1 increases slightly and V2 decreases by the same amount. This creates a pure differential input signal.
   ○ When V1 increases, the base-emitter voltage of Q1 (Vbe1) increases, causing Q1's collector current (Ic1) to increase.
   ○ Simultaneously, when V2 decreases, the base-emitter voltage of Q2 (Vbe2) decreases, causing Q2's collector current (Ic2) to decrease.
   ○ Crucially, because the total current flowing through the common emitter resistor RE (or current source) is relatively constant, the increase in Ic1 is almost perfectly balanced by a decrease in Ic2. The change in emitter voltage is minimal for differential signals because the effects from Q1 and Q2 cancel out.
   ○ These opposing changes in collector currents (Ic1 increasing, Ic2 decreasing) flow through their respective collector resistors (RC1 and RC2).
   ○ If Ic1 increases, Vc1 = Vcc - Ic1RC1 will decrease. If Ic2 decreases, Vc2 = Vcc - Ic2RC2 will increase.
   ○ The differential output voltage (Vc2 - Vc1) will therefore be amplified, as Vc2 increases while Vc1 decreases, resulting in a large difference. The amplifier efficiently translates the input voltage difference into a larger output voltage difference.

1. Common Mode Operation (Rejecting Common Signals):
   Now, consider an input where V1 and V2 both increase or decrease by the same amount simultaneously. This represents a common-mode signal, like noise picked up on both input lines.
   ○ If both V1 and V2 increase, both Q1 and Q2 attempt to increase their collector currents (Ic1 and Ic2).
   ○ This collective attempt to increase current causes the total emitter current (I_tail = Ic1 + Ic2) to increase.
   ○ This increased total current flows through the common emitter resistor (RE). The voltage drop across RE (V_RE = I_tail * RE) therefore increases.
   ○ As V_RE increases, the voltage at the emitters of Q1 and Q2 rises.
   ○ This rise in emitter voltage partially cancels out the increase in the base voltages (V1 and V2), effectively reducing the Vbe (or Vgs) of both transistors.
   ○ This negative feedback mechanism (due to RE) counteracts the original change in input common-mode voltage, suppressing the change in collector currents (Ic1 and Ic2).
   ○ Ideally, if RE were infinite (as provided by an ideal current source) and the transistors were perfectly matched, there would be no change in collector currents, and thus no change in output voltage for a common-mode input. In a practical circuit, a small common-mode output will exist, but it will be significantly attenuated compared to the differential signal. This demonstrates the amplifier's ability to reject common-mode signals.