24.4.2. ALU Operation Handling

A full program is written in terms of machine instruction that is macro program how it is executed. For each machine instruction when it is in the decoding cycle based on the Op-Code, the corresponding micro program is loaded into the memory.

In computer architecture, programs are typically written in high-level languages, which are then compiled or assembled into machine instructions known as macro instructions. When a macro instruction is about to be executed, the control unit begins the decoding process. This involves interpreting the instruction's Op-Code, which stands for Operation Code, that specifies which operation to perform. Based on this Op-Code, the relevant micro program, which is a lower-level set of instructions that directly control the hardware, is retrieved from memory and queued for execution.

Think of a macro instruction like a recipe for a dish and the micro instructions as the individual steps in that recipe. Just as you need to know the specific dish to understand the steps required to prepare it, the computer needs the Op-Code to load the appropriate micro program needed to execute the specified macro instruction.

For each fetch, the corresponding three micro instructions are executed, after that basically it waits; that means what? So, whenever a new instruction has to be executed, the micro program PC is pointed to the instruction which corresponds to basically your fetch.

The fetch phase is crucial in the execution of any program. During this phase, the control unit retrieves the next instruction from memory. For every instruction fetch, three specific micro instructions are executed sequentially. After these instructions execute, the system enters a waiting state until a new instruction needs to be executed. The Program Counter (PC) keeps track of the memory address of the next instruction, allowing the system to know precisely which instruction to fetch and execute next.

Imagine you are reading a book (the program). The act of opening the book to a specific page and reading its content corresponds to the fetch phase. Each time you turn a page (fetching an instruction), you perform a few actions like finding the page, turning it, and reading the information. Once you've read that page, you may stop briefly to consider what you've read before turning to the next page (waiting for the next instruction).

The micro program counter fetches each micro instruction in sequence and then generate the required signal or if required jumps will also be there.

The Micro Program Counter (MPC) is responsible for sequentially fetching micro instructions as defined by the controlling logic of the system. Once the MPC retrieves a micro instruction, it may generate specific control signals that activate various hardware components, depending on the instruction's requirements. In certain cases, if the current sequence needs to change—for example, based on the instruction type—jumps are made to different memory addresses to fetch the appropriate micro instructions for tasks like execution or memory accesses.

Picture a traffic light controller that changes signals based on the traffic flow at an intersection. As cars approach, the controller operates (fetches micro instructions) in a sequence but may occasionally need to change the sequence to efficiently manage the flow of traffic (jumping to a different set of instructions). Just like the traffic lights adjust based on conditions, the MPC adjusts its path to ensure the correct instructions are executed based on the current operation.

So, we require lot of branching parts; but that is however it’s ok. That is whatever is common you put together and whenever you have to go to some other part of the other instruction, which is uncommon between them.

In micro programming, branching refers to the ability to jump from one instruction path to another based on specific conditions. This is especially important for optimizing micro programs, as many instructions may share common operations while differing in crucial parts. By organizing micro instructions effectively—keeping common operations together and branching out only when necessary—systems can avoid redundancy in their control memory, making them more efficient and responsive.

Consider a travel itinerary where your route includes several common destinations such as a grocery store and gas station. If a friend wants to join you but has a different final destination, you wouldn't modify your entire route; instead, you would suggest they branch off at the intersection where you normally continue to your home. This approach keeps your journey efficient (common operations) while accommodating your friend's needs (branching out as necessary).

So, the common part of the micro routines can be shared which will reduce, but in that case we will require a lot of branching parts.

Optimization of micro programs involves finding ways to minimize redundancy while maintaining functionality. This is accomplished by defining and organizing common routines that serve multiple instructions, thus saving space in micro program memory. However, while this consolidation reduces memory size, it may require additional instructions to define branches or jumps for different instruction paths, making it essential to balance efficiency and complexity in design.

Imagine a software application that can serve different user profiles (like admin and guest). Instead of writing completely separate code for each profile, the developer can create a common codebase with different branching options that dictate the experience based on the user type. This method avoids repetition (optimized routine) while accommodating unique features for each user branch, striking a balance between efficiency and effectiveness.

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