30.1.4. Real Addition Process Using Multiple Buses

Now, we are going to take two examples; in one example we will show that what are the advantages of having three buses and another case we will show that we do not get so much advantage, if you are considering a multiple bus architecture. Two extremes that means two different instructions we will take and show, but for most of the cases we are always going to have an advantage, because that is very obvious because if you have multiple buses things will go parallelly...

In this section, we introduce the concept of a multiple bus architecture and its advantages. We will explore two cases: one where using three buses demonstrates significant benefits and another case to evaluate scenarios where the advantages may not be as evident. The idea is that when several buses operate simultaneously, operations can be executed in parallel, thus improving efficiency in processing.

Think of a busy restaurant kitchen where multiple chefs (buses) can work on different dishes at the same time. If all chefs are working on different tasks simultaneously, the overall cooking process will be faster than if only one chef prepared all the meals sequentially.

So, the first case we are going to take is add 𝑅 into 𝑅 . So, what is the thing? So, two variables already available in 𝑅 and 𝑅 and then one you have to do it. So, first is you have to fetch the instruction. So, how do you fetch the instruction? Basically program counter output value will go to memory address register in...

When adding two registers, the first step is to fetch the instruction from memory using the program counter (PC). The PC value is sent to a memory address register (MAR), which indicates where the instruction can be found in memory. By setting the memory in read mode, the required instruction is fetched efficiently without the need for temporary registers, allowing for quicker operations.

Imagine a librarian who uses an index card (program counter) to locate books (instructions) on the shelves (memory). Instead of needing another person to hold the card while they check out a book, the librarian can directly retrieve the book as soon as they find the location, speeding up the process.

Because we have already seen we do not require any kind of a temporary register. So, we do not have anything called 𝑍 or 𝑌 something like that to hold the value. So, what happens we will go to the figure and see what happens based on the PC operations...

In scenarios where multiple buses are employed, the need for temporary registers like 𝑍 or 𝑌 is eliminated. Instead, values can be directly processed and transferred across the buses. This directly improves system efficiency and reduces control signals since the operations happen concurrently across the buses. This streamlining means that the program counter and memory operations happen almost simultaneously without delays.

Using a highway with multiple lanes, where multiple cars (data) can travel to their destinations (operations) simultaneously is faster than a single lane where cars must wait behind each other. In this case, the lanes represent the buses in our architecture.

Now, let us see we have to now do the real addition? So, if you look at it. So, what is the addition? So, we are assuming that the two registers 𝑅 and 𝑅 already has the value...

For the real addition operation, values from registers 𝑅 and 𝑅 are pulled through different buses and sent immediately to the ALU for processing. This contrasts sharply with a single bus architecture where intermediate values must be stored temporarily, resulting in longer execution time. The addition can be completed in fewer steps and with less control overhead due to the bus structure allowing for inputs and outputs to happen simultaneously.

Think of a team of students working together on a project. If each student can take different aspects (like data from different registers) simultaneously to finish a part of the project (the addition) rather than waiting for each part to be completed one at a time (like storing in temporary registers), they will finish much faster.

So, if you look at a single bus architecture, it would be slightly more complicated. ... But in this case if you look at there is nothing called such type of any registers...

In a single bus architecture, operations would require extra steps to store intermediate results into temporary registers before completing the operation. This directly results in longer timelines for execution, as each instruction must wait for the previous to completely finish before starting. The absence of temporary registers in a multiple bus architecture simplifies the instruction handling and reduces execution time significantly.

Returning to our restaurant kitchen analogy, if a chef needs to complete a dish by preparing ingredients in one step, storing them in a counter temporarily, and then cooking them in another step, it takes longer than when they can just cook all at once without pausing.

So, this instruction shows a very explicit advantage of using a multiple bus architecture for most of the designs you will find out there are advantages...

Ultimately, the discussion culminates in demonstrating that multiple buses significantly enhance efficiency in arithmetic operations and reduce control signal complexity. Most instructions will tend to yield better performance metrics with this architecture.

This is akin to a well-organized team using a workflow system. When everyone knows their tasks and can work without interruption, the entire project progresses more efficiently than if everyone must complete tasks in sequence, dealing with interruptions.

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