14.5.2.1. Instruction Fetch Stages

As we have already discussed in the last unit that basically the first 3 steps that is step 1, step 2 and step 3, basically consist of instruction fetch. So, what happens in step 1? The program counter value is loaded into the bus. That bus basically or the program counter is read into memory address register. Memory is given in read mode and then actually in these 3 steps, ALU actually adds program counter value which is now in the bus with a constant value, which is the next memory location and then it is again waited to be loaded into the program counter in the next iteration.

The instruction fetch process consists of the first three steps. In Step 1, the value from the program counter (PC) is sent to a bus, which is used to communicate between different parts of a computer. This value is then loaded into the Memory Address Register (MAR), which tells the memory what location to read from. In Step 2, the ALU (Arithmetic Logic Unit) effectively says, 'Let's add 1 to the current program counter value' to get the address of the next instruction. Finally, during Step 3, the memory acknowledges it has the required instruction ready to send back.

Think of the instruction fetch process like a library. The program counter is like a librarian who knows where each book is stored. When a book (instruction) is needed, the librarian (PC) checks the location and goes to retrieve it. The MAR is the specific shelf marker, ensuring the librarian knows exactly where to go to find the book.

In step 4 from the instruction register, you will get the value of M. So, instruction may be something like opcode may be some register R etcetera and this memory location. So, the value of memory location will be taken from the instruction register and it should be loaded into the basically memory address register. So, memory address register will now have the value of M you will have to set the memory to read mode.

After fetching the instruction, Step 4 involves extracting the memory location (M) from the instruction register. This memory location is loaded into the Memory Address Register (MAR) to prepare for fetching the actual data (operand) from memory. The system sets the memory to read mode to enable access to that location.

Continuing the library analogy, once the librarian knows which book they need (the memory location), they look at the book's details (opcode and registers) and head to the correct shelf. Before pulling the book off the shelf, they ensure the library allows access to that shelf (setting the memory to read mode).

In step 5, you will wait for the memory to be ready. So, once the memory is ready the value of M that is the operand in M will be loaded into the memory data register and in the last that is the last stage, in the sixth stage we will actually transfer the value of the memory data register, which is now the operand to some register or to accumulator or to any other point, where you want to require.

Step 5 involves waiting for the memory to confirm it's ready (indicated by a signal). Once memory indicates readiness, the operand corresponding to the memory location M is transferred into the Memory Data Register (MDR). In the sixth and final step of this fetch process, the data from the MDR is then forwarded to an appropriate register (like the accumulator) for further processing. This completes the instruction fetch cycle.

Using the library analogy, once the librarian reaches the correct shelf and verifies the book is available, they take it off the shelf (loading it into the memory data register). Finally, they place the book onto a specific table (the accumulator or register) where it can be read or processed further.

Now, from 4 onwards depending on different addressing modes or the instruction types they will vary. So, for example, like for example, if the instruction is a direct instruction that is you have to read something from the read or write, something from the memory location.

Once the initial three fetch steps are completed, the next steps vary based on the type of addressing mode used in the instruction. For direct instructions, the specific memory location is directly specified in the instruction. The system will fetch the operand by simply accessing that location in memory. For indirect instructions, the system may need additional steps to first retrieve the address of the operand before fetching the actual data.

Imagine if the librarian has a direct order to fetch a specific book (the operand available directly at a known location), the process is straightforward. However, if they receive an order that says, 'go find the shelf with the title listed on another sheet' (an indirect addressing mode), they first need to locate that sheet before proceeding to find the real book.

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