9.5.2. Non-Vectored Interrupts

Non-vectored interrupts do not have a specific address for each interrupt. Instead, the ISR address is shared, and the processor must check the interrupt source to determine which action to take.

Non-vectored interrupts are a type of interrupt mechanism in which there isn’t a dedicated address or location in memory assigned to each interrupt source. Instead, when a non-vectored interrupt occurs, the CPU does not know immediately which specific interrupt service routine (ISR) to execute. Rather, it has to look up or check the interrupt source, which takes additional time. This lookup process means that non-vectored interrupts can be slower compared to vectored interrupts, where each interrupt has a unique entry point.

Think of a non-vectored interrupt like a general emergency alarm in a building. When the alarm goes off, instead of knowing exactly where the problem is (like knowing there's a fire in room 101), you first need to check different locations to find out what triggered the alarm before you can act. This leads to a delay in response.

In a vectored interrupt system, each interrupt has a unique entry in the interrupt vector table, pointing directly to the corresponding ISR. This makes the system fast and efficient when determining which interrupt service routine to execute.

Unlike non-vectored interrupts, vectored interrupts are designed to have a dedicated address for each interrupt in a table known as the interrupt vector table. This means when an interrupt occurs, the CPU can directly jump to the respective ISR without needing to perform any additional checks. This efficiency is vital in systems requiring quick responses to events because it simplifies the process of handling multiple interrupt sources.

Imagine a restaurant with a unique table number for each order. When the waiter receives a call for an order, they immediately know which table to go to without checking each table one by one. This efficiency in communication mirrors how vectored interrupts streamline service routines.

Non-vectored interrupts can simplify hardware design since fewer dedicated lines are needed for handling interrupts.

One key advantage of non-vectored interrupts is that they can reduce the complexity and cost of hardware design. Since there is no need for multiple lines or memory addresses to handle each interrupt, fewer resources are required. This can lead to a more compact design, which is particularly beneficial in embedded systems where space and resources can be limited.

Consider a small workshop where one person is responsible for managing all incoming orders. Instead of having separate counters for each type of order, all orders are handled at one central point. This centralization can save space and make management easier, just like how non-vectored interrupts can consolidate interrupt handling.

However, non-vectored interrupts can introduce delays in processing, as additional time is required to determine the source of the interrupt.

While non-vectored interrupts simplify hardware design, they do come with a trade-off: speed. The necessity to check which source triggered the interrupt can lead to increased processing time, especially in systems where rapid response to events is crucial. This delay can affect overall system performance, particularly in real-time applications where timing is critical.

Think of a call center where the calls come to a single, shared line. When the phone rings, the operator has to identify who the caller is before they can assist them. This creates a delay compared to having dedicated phone lines for each department, each responding immediately. In the same way, non-vectored interrupts can slow down a system's response time.

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