29.2. DMA Controller Context and Signals

In case of interrupt-driven I/O, there is a change of context. In case of DMA transfer, there is no context change; the context of the processor remains the same, whatever program it is executing.

In interrupt-driven I/O, when an interrupt occurs, the processor must stop its current task, save its state (context), and handle the interrupt. This means that the processor's flow of execution is interrupted, leading to a context switch. Conversely, in DMA (Direct Memory Access) transfers, the processor can continue with its operations without being interrupted. It doesn't have to change its context even though a DMA transfer is taking place. This allows for more efficient execution since the processor can carry out other tasks.

Imagine you're in the middle of a project at work (like writing a report). If a colleague interrupts you to ask for help with their project, you need to pause, focus on their issue, and then come back to your report. This is like an interrupt-driven I/O. However, if you could keep working on your report while a new printer (the DMA) prints a document in the background, that would be similar to how DMA allows the processor to continue its work.

CPU suspended just before it accesses the bus. The processor cannot access the main memory during this period, but can carry out its work if it has information in its instruction and data buffers.

Before a DMA transfer starts, the CPU is temporarily suspended right before it would normally access the memory bus. During this suspension, the DMA controller takes over access to the bus to transfer data directly between peripherals and memory. The CPU can still execute other instructions if it has relevant data or instructions already in its buffers, but if it needs data from memory that the DMA controller is currently using, it will hold off and wait until it can regain access to the bus.

Consider a restaurant kitchen where a chef normally handles multiple tasks, like cooking, plating, and serving food. If a delivery person arrives with new ingredients, the chef pauses plating to let the delivery person move their cart through the kitchen (similar to DMA taking control of the bus). However, if the chef has some food already prepared and just needs to plate it (using data from the buffers), they can keep working. If they need some fresh vegetables from the delivery cart, they have to pause their current task until the delivery is finished.

Two ways of transferring information are burst transfer mode and cycle stealing mode. In burst mode, the entire amount of data is transferred in one go. In cycle stealing mode, the transfer takes place byte by byte, allowing the CPU to use the bus between transfers.

In burst transfer mode, the DMA controller takes over control of the bus to transfer a large block of data (for example, 1000 bytes) all at once. Once the transfer is complete, it signals the CPU that it is done. This mode can lead to longer CPU suspension since the processor must wait until the entire block is transferred. In cycle stealing mode, the DMA controller transfers the data in smaller chunks (like one byte at a time), intermittently yielding control back to the CPU between transfers. This enables the CPU to perform operations between data transfers, reducing overall waiting time.

Think of burst mode like a big grocery delivery. The delivery truck (DMA) drops off all the groceries at once, and the homeowner (CPU) has to wait until every item is unloaded before they can put things away. Cycle stealing, on the other hand, is akin to having groceries delivered in smaller batches. The delivery person brings a few bags, lets the homeowner put them away, then comes back for more. This way, the homeowner isn’t waiting around for too long and can keep organizing their kitchen.

DMA impacts the CPU by temporarily suspending it when access to memory is needed but can also reduce waiting time by allowing access during cycle stealing mode.

When using DMA, the CPU may experience delays since it can't access memory during transfers. In burst mode, these delays can be significant as the CPU must wait for a large block to be transferred. However, using cycle stealing can reduce these delays because the CPU can still access memory in between the smaller DMA transfers. As a result, while there may still be some performance impact, it's not as severe as it might be under burst transfer mode.

Imagine you're doing laundry and waiting for the washing machine. If the machine is on a long cycle (burst mode), you can't do anything else until it’s done. But if it has a quick cycle (like cycle stealing) where it washes a few clothes, pauses to let you load in a few more, then washes again, you have more opportunity to get things done in the meantime as the washing machine allows you to intervene.

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