15.1.1. Fetching the Instruction

Now, we will go to the another mode, which is more complex in nature which is the indirect mode. By indirect mode already we mean that whenever it’s the indirect mode of 𝑀; that means, we say this is the memory here is 𝑀, at the address of 𝑀 here there may be some addresses called x is some content over here, then again you have to look at the content in x and basically this is your operand, this is what is the idea we all know about it.

The indirect mode is a method of addressing in which the instruction does not directly specify the operand but instead points to a memory location that contains the address of the operand. Here, 𝑴 refers to a memory address and when you access it, you find another address (𝑥) that leads to the actual data needed for processing. In essence, it indicates a two-step retrieval process: first obtaining the address (𝑥) which then needs to be accessed to fetch the actual operand.

Think of it like looking up a friend's contact using a phone book. The phone book entry gives you a number (𝑥) which you have to dial to reach your friend. The phone book itself (𝑴) does not directly connect you to your friend; it provides you with the necessary information to find them.

So, if you now look at basically your first 3 stages. So, first 3 stages; as I already were discussing like 𝑃𝐶 out 𝑀𝐴𝑅 and this is control stage basically are only for fetching the instruction.

The procedure of fetching an instruction comprises three main stages. The first step generates the Program Counter (𝑃𝐶) output to determine the next instruction to be executed. This output is then loaded into the Memory Address Register (𝑀𝐴𝑅) to indicate the target address in memory for the instruction retrieval. The Control Unit coordinates these actions. These stages are crucial as they prepare the CPU to understand and act upon the instruction that follows.

Imagine a waiter (CPU) who needs to take an order (instruction). The waiter first checks the customer’s table number (𝑃𝐶) and writes it down (𝑀𝐴𝑅), guiding them to the kitchen where they can get the right dish to serve (fetch the instruction).

This is the instruction load 𝑅 into memory from indirect memory location, that is the content of 𝑀 you have to again go to that memory location and there will get the operand it has to be loaded to 𝑅.

After the initial fetch stages, the CPU proceeds to load the actual instruction into a register. Here, the instruction specifies that the content at the indirect memory location 𝑴 needs to be fetched and placed into register 𝑅. This operation requires the CPU to first access 𝑀, retrieve the address (𝑥), and then use that address to get the operand to be loaded into the register.

Continuing with the waiter analogy, once the waiter knows the table number of the customer (address 𝑴), they go to the kitchen and fetch the specific dish (operand) that corresponds to that table (𝑥) and bring it back to serve.

So, in stage 5 we have to wait till everything is ready. So, once it is ready basically we know that the value of memory location 𝑀 that is 𝑥 in the example is now loaded into the memory data register.

In the fifth stage, the system needs to ensure all components are synchronized before proceeding. Once the relevant memory location 𝑴 has been accessed, the value found at that address (𝑥) is transferred to the Memory Data Register (MDR). This register temporarily holds the data acquired from memory, allowing the CPU to use it in subsequent operations.

Think of it like the waiter waiting for the chef to prepare the dish. Once the dish is ready, the chef places it on the counter (MDR) for the waiter to pick up and serve to the customer (use it in the next steps).

So, in two indirection stage 𝑅 , we have got the exact operand.

At this point, after going through the two indirection processes, the CPU has successfully retrieved the final operand, which is now available in register 𝑅. This step encapsulates the essence of indirect addressing, where multiple memory accesses lead to the final data that will be applied in the operation the instruction demands.

Returning to our earlier example, once the waiter has the dish prepared by the chef (final operand), they can now serve it to the customer; this is akin to loading the value into register 𝑅 for further processing in the CPU.

In the indirect mode we can get the values. So, now, again another mode we are taking which is called registering indirect...

Finally, the process of indirect addressing is summarized as allowing for flexible memory access where one retrieval leads to another. Following this method, the discussion transitions into another mode known as register indirect addressing, which simplifies the method by using registers instead of memory for addressing which generally speeds things up.

This can be thought of like getting a dish from a buffet (register indirect) which is typically a much faster process because you are serving yourself rather than waiting for a waiter to fetch it from the kitchen (memory indirect).

--