15.1.5. Final Operand Loading to Register

Now, we will go to the another mode, which is more complex in nature which is the indirect mode. By indirect mode already we mean that whenever it’s the indirect mode of 𝑀; that means, we say this is the memory here is 𝑀, at the address of 𝑀 here there may be some addresses called x is some content over here, then again you have to look at the content in x and basically this is your operand.

The indirect addressing mode allows the CPU to access operands stored at variable memory locations. In this mode, the instruction specifies a memory address (𝑀), but the actual data is found at another memory location, which is indicated by the content stored at the address of 𝑀. So, when the CPU fetches the instruction that refers to 𝑀, it first checks what is stored in 𝑀—this is often another address (x)—and then it retrieves the value located at x.

Imagine looking for a book in a library where the book's location is written on a piece of paper. First, you check the paper (𝑀) to find out where to go next (address x), and only after that do you go to that specific shelf to find the actual book (the operand).

So, if you now look at basically your first 3 stages. So, first 3 stages; as I already were discussing like 𝑃𝐶𝑜𝑢𝑡, 𝑀𝐴𝑅 and this is control stage basically are only for fetching the instruction. Next one is what I have to do. So, this is the instruction load 𝑅 into memory from indirect memory location, that is the content of 𝑀 you have to again go to that memory location and there will get the operand it has to be loaded to 𝑅.

The operand loading process involves several stages. The first three stages include fetching the instruction into the Program Counter (𝑃𝐶), placing the memory address of the instruction into the Memory Address Register (𝑀𝐴𝑅), and controlling the necessary operations to ensure that the correct instruction is retrieved. After fetching the instruction, it indicates that the CPU needs to load a value into the register (𝑅) from the indirect address specified (𝑀). This means the system must perform a second memory access to retrieve the actual operand located at the address specified by the content of 𝑀.

Think of it as sending a courier. The first stage is preparing the package (fetching the instruction): you need to know what the package is (the instruction to load). The second stage involves writing the delivery address on the package (putting the address in the MAR). After that, you need to send the courier to the delivery address to actually retrieve the contents (the operand) from the secondary location.

Of course, in stage 5 we have to wait till everything is ready. So, once it is ready basically we know that the value of memory location 𝑀 that is 𝑥 in the example is now loaded into the memory data register now interestingly for all cases what we have seen for most of the cases after the memory data out, we generally take this memory data out from the memory buffer register.

In stage five of the process, the CPU must wait until the necessary data is ready for use. At this point, the data from memory location 𝑀 (identified as 𝑥) is loaded into the Memory Data Register (MDR). Typically, in other modes, this data would be used directly. However, in the indirect addressing mode, the value of 𝑥 is fed back into the Memory Address Register (MAR) for another access, as this represents an additional layer of indirection where we must again access memory to finally retrieve the required operand.

Imagine again the library scenario. After you found out which shelf the book is on, you need to check that shelf to actually grab the book. So, even if you have the direction to the shelf (the value 𝑥), you can’t use it yet until you actually go and take the book from that location.

So, if you can see. So, your indirect mode if it’s the memory indirect mode you require 8 stages to do it, but if in your register indirect basically, you can solve it in 6, basically 6 steps of time. So, basically register indirect is a more faster mode compared to a or less number of steps required to a memory access.

The indirect addressing mode typically involves more stages than other types of addressing modes due to the additional memory access required. For memory indirect mode, you might need 8 stages to complete the loading of an operand. In contrast, register indirect mode simplifies the process and reduces it to about 6 stages, making it less complex and therefore faster.

Using a GPS (register indirect mode) to reach a destination is faster than asking for multiple directions from different people at each turn (memory indirect mode). The GPS gives you the most direct route without the need to check back with others about the next step, simplifying your journey and saving time.

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