15.1. Indirect Mode

Now, we will go to the another mode, which is more complex in nature which is the indirect mode. By indirect mode already we mean that whenever it’s the indirect mode of 𝑀; that means, we say this is the memory here is 𝑀, at the address of 𝑀 here there may be some addresses called x is some content over here, then again you have to look at the content in x and basically this is your operand, this is what is the idea we all know about it.

In the indirect mode, the memory reference doesn't directly point out to the operand (the actual data). Instead, it points to another memory location where the actual operand is stored. This adds a layer of complexity because you first access the address of the operand before retrieving the actual value.

Imagine you are trying to find a book in a library. Instead of going directly to the shelf where the book is placed, you first look at a catalog (the indirect mode) that indicates where to find the book. The catalog itself may be stored in a different location, similar to how a value in memory points to another memory location.

So, if you now look at basically your first 3 stages. So, first 3 stages; as I already were discussing like 𝑃𝐶𝑜𝑢𝑡, 𝑀𝐴𝑅 and this is control stage basically are only for fetching the instruction.

The first three stages in processing an indirect load instruction involve: 1. PC out (program counter output) fetching the instruction, 2. Loading that instruction into the Memory Address Register (MAR), and 3. Control stages that manage the flow of this instruction through the CPU.

Think of this like preparing to cook a recipe. First, you gather the ingredients (PC out), then refer to the recipe book (MAR) to see what you need to do next, and the cooking mechanism (control stage) ensures everything goes according to plan.

Next one is what I have to do. So, this is the instruction load 𝑅 into memory from indirect memory location, that is the content of 𝑀 you have to again go to that memory location and there will get the operand it has to be loaded to 𝑅 that is we say that load the control memory location 𝑀1 to register 𝑅 where 𝑀1 is specified in the memory location that is indirect and we assume that the length is one.

This stage describes the instruction where the CPU fetches data from an indirect memory location. Essentially, the CPU first retrieves the pointer from memory location M, discovers where the actual operand is stored (location M1), then loads that operand into the register R.

Returning to our library analogy, after checking the catalog, you then go to the actual location of the book indicated by the catalog to fetch it and finally bring it back to your table (register R) to read.

Of course, in stage 5 we have to wait till everything is ready. So, once it is ready basically we know that the value of memory location 𝑀 that is 𝑥 in the example is now loaded into the memory data register.

At this stage, the system must synchronize its actions. After fetching the value from the indirect memory address, the value stored at that address (x) is loaded into the Memory Data Register (MDR) and prepared for the next phase.

Imagine waiting for the librarian to bring back the book you asked for. You need to wait until they return with the correct book before you can proceed to read it (load it into your register).

So, now you can read the value of 𝑥. After that the content we can say that now the content is l. So, that content will again come here and which is actually your real operand.

Finally, once the value of x is in the MDR, the system will load the actual operand, which we've denoted as l, into register R. This marks the completion of fetching the operand through the indirect addressing method.

Continuing with the library reference, this is the moment when you finally have the book (the content 'l') in your hands and can begin reading it (utilizing it in register R).

If you can see. So, your indirect mode if it’s the memory indirect mode you require 8 stages to do it, but if in your register indirect basically, you can solve it in 6, basically 6 steps of time.

In summary, the indirect mode of addressing can involve multiple steps to retrieve data from memory, specifically needing 8 stages for memory indirect mode compared to the 6 stages required for register indirect mode, highlighting efficiency in accessing data depending on the addressing mode used.

It’s akin to efficiently finding your way in a complex library. The more direct your route to the information (like going to a nearby register), the faster you can obtain the knowledge you're seeking.

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