15.2.3. Timing and Steps Involved

Now, we will go to the another mode, which is more complex in nature which is the indirect mode...

This section introduces what is known as indirect mode in computer architecture. In this context, when we refer to the indirect mode of memory (M), it implies that the actual operand is not directly available in the memory address but instead is pointed to by another memory address. To fetch the required data, we have to first read the address (x) from M, and then from that address, retrieve the actual data needed for processing.

Think of it like a treasure map (memory M) that does not directly tell you where the treasure (data) is buried, but rather gives you coordinates (address x) to another map that holds the final treasure location. You first check the main map, get the coordinates, and then use those to find the treasure.

So, if you now look at basically your first 3 stages. So, first 3 stages; as I already were discussing like $PC_{out}$, $MAR$ and this is control stage basically are only for fetching the instruction.

This chunk discusses the first three stages in the process of fetching an instruction. The Program Counter (PC) outputs the address from which the instruction needs to be fetched, and this address is then stored in the Memory Address Register (MAR). The control stage manages this whole process to ensure that the instruction is fetched properly.

Imagine you are looking for a book in a library. The PC is like your library card that tells you where the book is located in terms of aisle and shelf; the MAR is like writing down its location on a notepad, and the control stage is like the librarian who helps you find that book on your own.

Next one is what I have to do. So, this is the instruction load R into memory from indirect memory location.

Once the instruction is fetched, the actual operation involves loading the data from an indirect memory location into a register R. This involves referencing another address specified in memory and ultimately fetching the required operand to be used in computations.

In our library analogy, after writing down the location of the book, you actually go to that aisle, pick up the book (which represents the data), and place it on your reading table (the register R) to start reading.

Of course, in stage 5 we have to wait till everything is ready...

In stage 5, after setting the address in the MAR, the system needs to wait for the memory fetch cycle (MFC) to complete. Once the data from the memory is ready, it gets loaded into the Memory Data Register (MDR), which is then used to load the operand into the register R.

Continuing the library analogy, after fetching the book, you have to sit and read it for a while before you start writing notes. In this case, the waiting period allows the processor to ensure that the data is fully available before processing.

this $Memory ext{ } Data ext{ } out$ will be fed to the memory address register...

Interestingly, in this indirect mode operation, the data fetched does not get directly used. Instead, it first needs to be fed back into the Memory Address Register for further access to the value it holds. This loop allows the system to access the final operand that is derived through the indirect reference.

Think of it like using a library book to look up another reference. You read something in the book that leads you to a new reference. Instead of just taking that first book home, you note down another book's location to access further information.

So, in this case now it will be an $x$...

After all the manipulations and stages are completed, in the end, the correct operand l gets transferred into register R. This shows the effectiveness and efficiency of using the indirect mode across stages, which requires a total of 8 stages when done properly.

In our library analogy, once you’ve successfully found and read all the relevant materials, you gather everything needed for your assignment. The steps taken to maneuver through the library to gather information mirror the steps taken in the indirect mode to access and utilize data.

if you can see. So, your indirect mode if it’s the memory indirect mode you require 8 stages to do it...

This section highlights the comparison of the number of steps required in different indirect addressing modes. The memory indirect mode requires more steps compared to register indirect mode, emphasizing how different modes can lead to varying efficiencies in instruction fetching and execution.

Like different routes to reach a destination, some routes may be longer due to traffic (memory indirect mode), while others are quicker with fewer stops (register indirect mode), but the destination remains the same.

--