2.2.4. Example: Simple AND Gate

Try these first

1. 1.

   What does an entity define in VHDL?

   Hint

   Consider what connects the internal function to the external environment.

2. 2.

   What data type is used for digital signals in the AND gate example?

   Hint

   Think about what value representations are used.

3. 3.

   What is the function of the entity in a VHDL program?

   • Defines the circuit behavior
   • Defines inputs/outputs
   • Defines the architecture

   Hint

   Think about what connects internal functions to the outside world.

4. 4.

   True or False: The architecture section is where we specify the type of the signals.

   • True
   • False

   Hint

   Recall what each section is responsible for.

5. 5.

   Modify the provided VHDL code of the AND gate to implement a 2-input OR gate instead.

   Hint

   Change the logical operator from AND to OR.

6. 6.

   Explain how you would implement a simple NOT gate in VHDL, including both the entity and architecture.

   Hint

   Recall the role of negation in logical operations.